PhD

Smart Systems and Energy Technology

CMOS design for mm-wave applications

In a few years from now, applications will pop up that require wireless transmission above 1 Gbit/s: wireless transfer of uncompressed high-definition TV images, wireless docking stations, fast kiosk downloading, ... These applications, which have mass-market potential, operate around 60 GHz and use a bandwidth up to 7 GHz. A cheap implementation of a 60 GHz wireless transceiver requires advanced CMOS technology, such as the 45 nm generation, which features very high cutoff frequencies. However, millimeter-wave design in CMOS is not easy. This is due to the stronger influence at higher frequencies of small parasitics. Further, the design of the analog baseband part of a 60 GHz transceiver is not easy neither due to the large bandwidth of the baseband signal.

This PhD team tackles challenges both at the circuit level and the architectural level. Design of functional blocks such as low-noise amplifiers, mixers, voltage-controlled oscillators, power amplifiers, filters, analog-to-digital and digital-to-analog converters will be considered. Further, optimal architectures to implement beamforming will be studied. Here the limitations of aggressively downscaled CMOS (such as lower intrinsic gain, more leakage current, limited signal swings, large variability) must be taken into account, while its features (high cutoff frequency, very compact digital circuits) should be exploited as much as possible.

Responsible scientists: Jan Craninckx, Piet Wambacq, Liesbet Van der Perre