Compatible with industry-standard design frameworks, the prototype SWAN tool brings new level of analysis to ultra-deep submicron CMOS technologies.

Leuven, Belgium, September 22, 2003 --- IMEC, Europe’s largest independent microelectronics and ICT research center, has developed a design technology supported by a prototype tool that can quickly model and then analyze noise generated on both low- and high-ohmic substrates used in ultra-deep submicron CMOS technologies.  The prototype tool, called SWAN (substrate-noise waveform analysis), removes a critical barrier in the design of mixed-signal systems-on-chips by offering a means to model and analyze the substrate-noise generation which can be used in combination with existing EDA tools to determine the propagation and impact on the devices.

Designing mixed-signal systems on chips (SoCs) presents significant challenges because the noise generated by large digital circuits can severely deteriorate the performance of the analog circuits integrated on the same substrate.  In addition, the complexity that can be integrated on a single die in ultra-deep submicron technologies has taxed current design methodologies and supporting electronic design automation (EDA) tools to their limits. Current available EDA tools can simulate the impact of substrate noise on analog devices but they don’t help the designers in determining the substrate noise generated by the digital circuits.

IMEC’s SWAN prototype tool addresses these issues by offering a complete modeling and analysis flow starting from gate-level description. The prototype tool is compatible with all commonly used industry-standard design frameworks, gate-level simulators and substrate-network extraction tools.

To analyze the impact of substrate noise on the performance of the analog circuits, it is first necessary to determine the amount of noise generated by the digital circuitry of the device.  SWAN uses macro-models to accomplish this.  The technique, which has also been used by IMEC in low-ohmic devices, has been adapted for high-ohmic substrates, including the process for addressing circuit-to-substrate coupling.

SWAN consists of two parts:  a standard-cell library characterization and a substrate-noise waveform computation.  First, the substrate-noise generation and power-supply current related to switching activity of all standard cells in the design are extracted and recorded in a database together with a one-port model of the standard cell’s power-supply admittance.  This step needs to be done only once for a given technology and cell library.

Next, the substrate noise is calculated for the design.  All switching events for each gate are extracted from a standard gate-level VHDL simulation.  By combining the switching-noise generation model of each gate with the switching-activity data, it is possible to calculate an accurate waveform of the switching current and ground bounce. 

The switching currents can be combined with package parasitic models and, for high-ohmic substrates, with a circuit-level substrate network that has been extracted with industry-standard EDA tools and that models the circuit-to-substrate coupling.  Designers can then calculate high-ohmic substrate-noise voltages on the sensitive analog nodes caused by the ground bounce of complex digital circuits. 

The design technology supported by the prototype SWAN tool is available for industry via joint research projects either bilateral or within IMEC’s Industrial Affiliation Program (IIAP) on broadband wireless systems. These projects can give partners a better insight in the mechanisms of noise generation, and hence help to develop noise avoidance or noise reduction techniques in mixed-signal designs. Partners can use the modeling techniques in their own design flow to improve their productivity of mixed-signal chips (towards a first-time-right design flow). IMEC is also looking at opportunities to launch the design technology through an EDA company for a broader public.

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Notes to editors

About IMEC

IMEC (Inter-university MicroElectronics Center) was founded in 1984 and today is Europe’s largest independent research center in the field of microelectronics, nanotechnology, enabling design methods and technologies for ICT systems. IMEC's activities concentrate on the design technology for integrated information and communication systems; silicon process steps and modules, silicon processes; nanotechnology, microsystems, alternative devices and packaging; solar cells; and advanced training in microelectronics. IMEC is headquartered in Leuven, Belgium, and has a staff of more than 1250 people including over 380 industrial residents and guest researchers. Its revenue of more than 138Meuro is derived from agreements and contracts with the Flemish government, equipment and material suppliers and semiconductor and system-oriented companies worldwide, the EC, MEDEA+ and ESA. News from IMEC is located at www.imec.be.

For more information:

Katrien Marent

Corporate Communication Manager

IMEC, Kapeldreef 75

B- 3001 Leuven, Belgium

Tel +32 16 28 18 80 Fax +32 16 28 16 37

Email: Katrien.Marent@imec.be