Scaling-driven nanoelectronics

3D integration: design and architecture of 3D ICs

• 3D systems-in-a-package
• 3D wafer-level packaging
• 3D stacked IC and 3D IC
• 3D design
• Packaging reliability

In a 3D-SIP, separately fabricated chips are stacked and connected. 3D SiPs are created using traditional package interconnect technology. Basically, they are stacked ballgrid-array packages. The difference with standard package-on-package stacking is that each layer is self-contained and can be tested individually. This ensures the 3D stack contains only faultless units. And as each layer is a self-contained subsystem, the layers need only a limited number of interconnections.

Invent - Imec is currently focusing on integrating wireless systems into 3D SiP cubes, using solder ball-based 3D assembly with lead-free materials.

Achieve - Imec has developed 3D SiP cube prototypes of wireless sensors, resulting in designs that are much more compact than classic printed circuit boards. One example is a wireless EEG system integrating an eight-channel bio-potential readout ASIC, a commercial microprocessor, and a 2.4GHz radio, integrated in a 1.35cm3 SiP.